الوضع الليلي
10:51:55 
2026-06-03 
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As space exploration takes spacecraft and crews farther and farther from Earth, the need for systems that can operate with minimal (or zero) human oversight increases.
This is needed in part because of the distances involved, where astronauts on the Moon and Mars will be subject to communication delays that make it harder to send and receive reports and data promptly.
At the same time, autonomous systems have the potential to accelerate the rate of scientific returns through faster data analysis.
Processors also need to be hardened to withstand the harsh environment of space, including extreme temperatures and high levels of radiation.
To address this need, NASA's Game Changing Development (GCD) program entered into a commercial partnership to develop the High-Performance Spaceflight Computing (HPSC) system.
This revolutionary chip will give spacecraft the processing capabilities to think for themselves, and it just completed its first round of environmental tests.
Traditionally, NASA has relied on chips developed in previous decades, which were designed to be hardy and reliable. But given the current rate at which missions accumulate data, upgraded chips are needed to process and analyze it faster and more efficiently.
This has led NASA and the Arizona-based tech company Microchip Technology Inc. to create HPSC, a radiation-hardened high-performance processor capable of delivering 100 times the computing capability of current systems.
The HPSC processor is an example of a system-on-a-chip (SoC), a compact integrated circuit typically found in smartphones and tablets that integrates all essential elements of a computing system into a single microchip.
This includes central processing units (CPUs, computational offloads, advanced networking units, memory, and input/output interfaces.
However, only the SoCs JPL is testing are built to survive for years while operating millions or even billions of km from Earth and repair facilities.
"Building on the legacy of previous space processors, this new multicore system is fault-tolerant, flexible, and extremely high-performing," said Eugene Schwanbeck, program element manager in NASA's GCD program.
"NASA's commitment to advancing spaceflight computing is a triumph of technical achievement and collaboration."
In addition to computing power, the chips will provide high-performance AI dataflow processing with scalable vector computing capabilities.
The HPSC is designed to be adaptable in terms of power consumption and computing performance, so functions can be turned off when not in use or put into lower-power modes.
This ability means the HPSC processor can be used for missions with varying power requirements, improving power efficiency since electrical power is such a vital resource in space.
To ensure these chips can handle spaceflight, technicians at NASA's Jet Propulsion Laboratory have been conducting various tests that replicate the challenges they will face, such as electromagnetic radiation and extreme temperatures.
High-energy particles from the Sun (solar wind) and cosmic rays can cause errors, and extreme cold can cause batteries to shut down, both of which will send a spacecraft into "safe mode."
"We are putting these new chips through the wringer by carrying out radiation, thermal, and shock tests while also evaluating their performance through a rigorous functional test campaign," said Jim Butler, High Performance Space Computing project manager at JPL.
"To simulate real-world performance, we are using high-fidelity landing scenarios from real NASA missions that would typically require power-intensive hardware to process huge volumes of landing-sensor data. This is an exciting time for us to be working on hardware that will enable NASA's next giant leaps."
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